Design of ASICs with low non returning engineering cost
Most manufacturers of ASICs have optimized their technologies for the production of very high volumes at low costs. However, the development of an ASIC in such technologies is a considerable financial investment.
Some manufacturers optimized their technologies for low to medium volume products. Such ASICs are not sufficient for the highest technical specifications, but are adequate for many applications. And most of all: their development costs are much lower. So the development of an ASIC often becomes financially feasible for medium sized companies or even in a research project.
Several times already we have executed the overall development of mixed mode gate arrays for our customers. Mixed mode gate arrays enable the integration of analog and digital components on a single die at comparatively low development costs. An electronics can be miniaturized this way, the consumption of electrical power is reduced. These are clear advantages, especially in mobile applications.